www.kersemi.com 1 power mosfet irfr430a, irfu430a, sihfr430a, sihfu430a features ? low gate charge q g results in simple drive requirement ? improved gate, avalanche and dynamic dv/dt ruggedness ? fully characterized capacitance and avalanche voltage and current ? effective c oss specified ? lead (pb)-free available applications ? switch mode power supply (smps) ? uninterruptible power supply ? high speed power switching note a. see device orientation. notes a. repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. starting t j = 25 c, l = 11 mh, r g = 25 , i as = 5.0 a (see fig. 12). c. i sd 5.0 a, di/dt 320 a/s, v dd v ds , t j 150 c. d. 1.6 mm from case. product summary v ds (v) 500 r ds(on) ( )v gs = 10 v 1.7 q g (max.) (nc) 24 q gs (nc) 6.5 q gd (nc) 13 configuration single n -channel mosfet g d s dpak (to-252) ipak (to-251) a v aila b le rohs* compliant ordering information package dpak (to-252) dpak (to-252) d pak (to-252) dpak (to-252) ipak (to-251) lead (pb)-free IRFR430APBF irfr430atrpbf a irfr430atrlpbf a irfr430atrrpbf a irfu430apbf sihfr430a-e3 sihfr430at-e3 a sihfr430atl-e3 a sihfr430atr-e3 a sihfu430a-e3 snpb irfr430a irfr430atr a irfr430atrl a irfr430atrr a irfu430a sihfr430a sihfr430at a sihfr430atl a sihfr430atr a sihfu430a absolute maximum ratings t c = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds 500 v gate-source voltage v gs 30 continuous drain current v gs at 10 v t c = 25 c i d 5.0 a t c = 100 c 3.2 pulsed drain current a i dm 20 linear derating factor 0.91 w/c single pulse avalanche energy b e as 130 mj repetitive avalanche current a i ar 5.0 a repetitive avalanche energy a e ar 11 mj maximum power dissipation t c = 25 c p d 110 w peak diode recovery dv/dt c dv/dt 3.0 v/ns operating junction and storage temperature range t j , t stg - 55 to + 150 c soldering recommendations (p eak temperature) for 10 s 300 d
www.kersemi.com 2 irfr430a, irfu430a, sihfr430a, sihfu430a notes a. repetitive rating; pulse width limited by maximum junction temper ature (see fig. 11). b. pulse width 300 s; duty cycle 2 %. c. c oss eff. is a fixed capacitance that gi ves the same charging time as c oss while v ds is rising from 0 to 80 % v ds . thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient r thja -62 c/w case-to-sink, flat, greased surface r thcs 0.50 - maximum junction-to-case (drain) r thjc -1.1 specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 500 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = 1 ma - 0.60 - v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 2.0 - 4.5 v gate-source leakage i gss v gs = 30 v - - 100 na zero gate voltage drain current i dss v ds = 500 v, v gs = 0 v - - 25 a v ds = 400 v, v gs = 0 v, t j = 125 c - - 250 drain-source on-state resistance r ds(on) v gs = 10 v i d = 3.0 a b --1.7 forward transconductance g fs v ds = 50 v, i d = 3.0 a 2.3 - - s dynamic input capacitance c iss v gs = 0 v, v ds = 25 v, f = 1.0 mhz, see fig. 5 - 490 - pf output capacitance c oss -75- reverse transfer capacitance c rss -4.5- output capacitance c oss v gs = 10 v v ds = 1.0 v, f = 1.0 mhz - 750 - pf v ds = 400 v, f = 1.0 mhz - 25 - effective output capacitance c oss eff. v ds = 0 v to 400 v c -51- total gate charge q g v gs = 10 v i d = 5.0 a, v ds = 400 v, see fig. 6 and 13 b --24 nc gate-source charge q gs --6.5 gate-drain charge q gd --13 turn-on delay time t d(on) v dd = 250 v, i d = 5.0 a, r g = 15 , r d = 50 , see fig. 10 b -8.7- ns rise time t r -27- turn-off delay time t d(off) -17- fall time t f -16- drain-source body diode characteristics continuous source-drain diode current i s mosfet symbol showing the integral reverse p - n junction diode --5.0 a pulsed diode forward current a i sm --20 body diode voltage v sd t j = 25 c, i s = 5.0 a, v gs = 0 v b --1.5v body diode reverse recovery time t rr t j = 25 c, i f = 5.0 a, di/dt = 100 a/s b - 410 620 ns body diode reverse recovery charge q rr -1.42.1c forward turn-on time t on intrinsic turn-on time is neglig ible (turn-on is dominated by l s and l d ) s d g
www.kersemi.com 3 irfr430a, irfu430a, sihfr430a, sihfu430a typical characteristics 25 c, unless otherwise noted fig. 1 - typical output characteristics fig. 2 - typical output characteristics fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.001 0.01 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 25c vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 150c vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 4.0 6.0 8.0 10.0 12.0 14.0 16.0 v gs , gate-to-source voltage (v) 0.01 0.10 1.00 10.00 100.00 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 150c v ds = 100v 20s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 5.0a
www.kersemi.com 4 irfr430a, irfu430a, sihfr430a, sihfu430a fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-drain diode forward voltage fig. 8 - maximum safe operating area 1 10 100 1000 v ds , drain-to-source voltage (v) 1 10 100 1000 10000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 4 8 12 16 20 0 2 5 7 10 12 q , total gate charge (nc) v , gate-to-source voltage (v) g gs i = d 5.0a v = 100v ds v = 250v ds v = 400v ds 0.1 1 10 100 0.2 0.5 0.8 1.1 1.4 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 150 c j t = 25 c j 10 100 1000 10000 v ds , drain-tosource voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 150c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec
www.kersemi.com 5 irfr430a, irfu430a, sihfr430a, sihfu430a fig. 9 - maximum drain current vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case fig. 12a - unclamped inductive test circui t fig. 12b - unclamped inductive waveforms 25 50 75 100 125 150 0.0 1.1 2.2 3.3 4.4 5.5 t , case temperature ( c) i , drain current (a) c d p u lse w idth 1 s d u ty factor 0.1 % r d v gs r g d.u.t. 10 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) a r g i as 0.01 t p d.u.t l v ds + - v dd dri v er 15 v 20 v i as v ds t p
www.kersemi.com 6 irfr430a, irfu430a, sihfr430a, sihfu430a fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 12d - threshold voltage vs. temperature fig. 13b - gate charge test circuit 25 50 75 100 125 150 0 50 100 150 200 250 starting tj, junction temperature ( c) e , single pulse avalanche energy (mj) as i d top bottom 2.2a 3.2a 5.0a q gs q gd q g v g charge v gs -75 -50 -25 0 25 50 75 100 125 150 t j , temperature ( c ) 2.5 3.0 3.5 4.0 4.5 5.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v c u rrent reg u lator c u rrent sampling resistors same type as d.u.t. + -
www.kersemi.com 7 irfr430a, irfu430a, sihfr430a, sihfu430a fig. 14 - for n-channel p. w . period di/dt diode reco v ery d v /dt ripple 5 % body diode for w ard drop re-applied v oltage re v erse reco v ery c u rrent body diode for w ard c u rrent v gs = 10 v * v dd i sd dri v er gate dri v e d.u.t. i sd w a v eform d.u.t. v ds w a v eform ind u ctor c u rrent d = p. w . period + - + + + - - - * v gs = 5 v for logic le v el de v ices peak diode recovery dv/dt test circuit v dd ? d v /dt controlled b y r g ? dri v er same type as d.u.t. ? i sd controlled b y d u ty factor "d" ? d.u.t. - de v ice u nder test d.u.t circ u it layo u t considerations ? lo w stray ind u ctance ? gro u nd plane ? lo w leakage ind u ctance c u rrent transformer r g
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